1. Field of the Invention
The present invention relates to a semiconductor device and, for example, to a semiconductor device including an overcurrent protection element to prevent an overcurrent from flowing in the semiconductor device by a surge.
2. Description of the Related Art
Along with the recent progress of the techniques for micropatterning a MOS field effect transistor (to be referred to as a MOSFET hereinafter) and thinning a gate insulating film by decreasing the voltage, the importance of electrostatic destroy (ESD) protection elements which protect a gate insulating film from ESD is growing.
Some ESD protection elements are formed from a MOSFET in which the drain diffusion layer has, at a part, a salicide block region with no salicide cover. For example, a MOSFET, which forms a protection element, has a salicide block region to protect the gate insulating film from ESD, as shown in FIG. 1B of Japanese Patent No. 3319445, so that a salicide length L2 on the drain diffusion layer adjacent to the gate electrode becomes shorter than a gate length L1, thereby suppressing current crowding by salicide.
FIG. 4 shows the circuit structure of a protection element with a finger structure formed by a plurality of MOSFETs. When the overcurrent protection element with a finger structure is formed by using a plurality of MOSFETs shown in FIG. 4, the plurality of MOSFETs cannot uniformly be turned on because values of a trigger voltage Vt1 of the MOSFETs vary. For this reason, an overcurrent flows into only some of the MOSFETs, so that they are destroyed. Hence, the overcurrent cannot be discharged.
To uniformly turn on the plurality of MOSFETs to prevent the overcurrent from flowing into only some of them, the resistance of the drain region must be maintained at a predetermined value or more. In addition, the plurality of MOSFETs must be turned on before the current flowing to some of them reaches a breakdown current. However, even in the MOSFET having the above-described structure, it is difficult to maintain the resistance of the drain region, which decreases along with size reduction of a MOSFET.